1. Field of the Invention
The present invention relates to a common mode choke coil, a method of manufacturing the same, and a common mode choke coil array. More particularly, the invention relates to a filter used for suppressing a common mode current which can cause electromagnetic interference that is a problem in a balanced transmission system and a method of manufacturing the same.
2. Description of the Related Art
Multi-layer type choke coils have been known as chip type common mode choke coils. This type of component is constructed by alternately forming magnetic sheets for a first coil which are magnetic sheets made of ferrite having a coil conductor pattern formed on a surface thereof and similar magnetic sheets for a second coil.
The common mode choke coil disclosed in Japanese Patent Laid-Open No. JP-A-8-203737 (hereinafter referred to as “Patent Document 1”) is known as a component utilizing thin film techniques. This component is constructed by forming a lead-out electrode using thin film techniques on a magnetic substrate, thereafter forming an insulation layer, a first coil conductor, another insulation layer, a second coil conductor and another insulation layer sequentially, and sandwiching them with another magnetic substrate from above.
In some common mode choke coils utilizing thin film techniques, as disclosed in Japanese Patent Laid-Open No. JP-A-11-54326 (hereinafter referred to as “Patent Document 2”), in order to improve magnetic coupling between coils and to increase common impedance, a closed magnetic path structure is formed by etching central parts and peripheral parts of insulation layers as described above and bonding an upper magnetic substrate using a resin that is a mixture of an insulating material and magnetic powder.
In some common mode choke coils utilizing thin film techniques, as disclosed in Japanese Patent Laid-Open No. JP-A-2003-133135 (hereinafter referred to as “Patent Document 3”), a multi-layer element, which is a structure having a coil disposed in an insulating element provided by disposing insulation layers and coil patterns one over another on a first magnetic substrate, is formed with at least one recess extending from the top surface of the element up to the first magnetic substrate in a part of the element where no coil pattern is disposed. Further, a part of a magnetic layer disposed so as to cover the multi-layer element is embedded in the recess; and a second (upper) magnetic substrate is bonded to the magnetic layer through a non-magnetic bonding layer.
In any of the above-described common mode choke coils utilizing thin film techniques according to Patent Documents 1, 2 and 3, it is necessary to adjust the number of turns and length of the conductor and to adjust the magnetic permeability of the magnetic material in order to achieve a predetermined value of impedance (in particular, common impedance).
However, it is sometimes difficult to adjust the number of turns of the conductor because of limitations associated with the position in which an external electrode is led out. The adjustment of the conductor length is sometimes difficult for reasons associated with the shape of the chip. Further, it is quite difficult to adjust the permeability of the magnetic material minutely.
Thus, various conditions must be changed and examined one by one to adjust the impedance value, which results in a heavy burden in terms of both time and cost.
As a solution to this, according to the invention, an insulation layer for impedance value adjustment is formed on a magnetic substrate to allow impedance to be adjusted only by adjusting the thickness of the insulation layer. Thin film forming techniques are used for the insulation layer for impedance value adjustment to achieve an impedance value accurately with small variation.
In view of the above-described points, it is an object of the invention to provide a common mode choke coil, a method of manufacturing the same, and a common mode choke oil array in which an impedance value can be easily adjusted by changing the thickness of an insulation layer for impedance value adjustment appropriately.